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Hardware

FPGA

CLP-17: High Performance Elliptic Curve Cryptography (ECC) Point Multiplier Core

Elliptic Curve Cryptography (ECC) relies upon the difficulty of the Elliptic Curve Discrete Logarithm Problem (ECDLP) and was proposed by Miller and Koblitz in 1985. The advantages of ECC over classical cryptosystems like RSA/Diffie-Hellman (D-H) include higher speed, lower power consumption, less bandwidth, and less storage requirements. The CLP-17 offloads the computationally difficult aspects of Elliptic Curve calculation and can be tailored to the application with build options that span low power hand-held requirements to high-performance designs for Ethernet passive optical networking (EPON) systems.

Key Features:

  • Offloads the computationally intensive parts of ECC public key cryptography
  • Options for various ECC key/field sizes: 163, 191, 233, 283, 409 & 571
  • Build options for different performance levels - e.g. for 163 bit key/field size:
  • Acts as a processor peripheral

Applications:

  • IPSec and SSL Consumer Gateways and VPN products
  • Low Power Portable Web Clients (PDA, Cell Phones)
  • Portable Media Devices (DRM component)
  • Smart Cards
  • Ethernet passive optical systems (EPON)
  • Government and military communications systems

General Description

The Elliptic Curve Cryptosystem (ECC) is a method based on the Discrete Logarithm Problem over points on an Elliptic curve. ECC has so far shown no weakness and as such several algorithms have been created primarily in asymmetric or public-key cryptography for key exchange and digital signature applications. The most common algorithms are:

  • Public Key - Elliptic Curve Diffie Hellman Key Exchange (EC-DHKE)
  • Public Key - Elliptic Curve ElGamal (EC-ElGamal)
  • Digital Signature - Elliptic Curve Digital Signature (EC-DSA)

The primary advantage of the ECC algorithm over the comparable RSA public key algorithms is reduced key size (and relative increase in speed of processing). A comparison between the ECC/D-H and RSA/D-H algorithms is presented in the following table.

ECC -DH Key/Field Size (bits) Equivalent Security with RSA/D-H (bits) Ratio
163 1024 1:6
256 3072 1:12

Performance and Slice Count:

The following table indicates a subset of the performance options for the CLP-17 for the Lattice ECP2 family of FGPAs.

ECC Key Size (m in GF(2m)) Point Multiplications (operations/s) Slice Count Clock Rate (MHz)
191 1000 10905 44
191 800 9863 50
191 400 8822 50

The core is highly configurable. If you have interest in the CLP-17 in different FPGAs, please contact Elliptic for more information on the specific FPGA and clock speed you are considering.



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