硬件

FPGA

CLP-300f: Public Key Accelerator

Public key cryptography requires complex mathematical operations on very large numbers (from 160- to 4096-bits, or more). The majority of embedded CPUs are limited to operations on 32- and 64-bits values and require a significant amount of computational resources when implementing these security algorithms.

CLP-300f is a co-processor dedicated to the computationally intensive elements of the mathematics required for RSA operations as well as the algorithms used in prime field Elliptic Curve Cryptography (ECC). The CLP-300f integrates seamlessly with the Ellipsys^TM Cryptography Middleware, and the designer can accelerate the asymmetric cryptography required in public key algorithms to reach performance levels that are not achievable in software only solutions.

The traditional RSA, Digital Signature Algorithm (DSA) and Diffie-Hellman (DH) asymmetric algorithms require the calculation of complex modular exponentiation operations to encrypt, decrypt, sign and verify data for public key negotiations or digital signature schemes.

Similarly, ECC requires a number of complex mathematical operations, such as point multiplications, in support of public key negotiations and digital signature schemes.

CLP-300f Public Key Accelerator (PKA) is designed to significantly accelerate these cumbersome operations. The engine is highly configurable and can cover a broad range of mathematical operations, size and performance options.

With these configuration options, customers can select a wide range of capabilities suitable for applications ranging from base stations in WiMAX and 3GPP Long Term Evolution (LTE) designs, to National Security Agency (NSA) Suite B and security blades in network edge routers.

FPGA Reference Data:

• Xilinx, Virtex-6, LX75T-3
• CLP-300f configuration 32B
• 113 RSA-1024/sec with CRT
• 20 RSA-2048/sec with CRT
• 196 ECC-160/sec
• 144 ECC-192/sec
• 109 ECC-224/sec
• 84 ECC-256/sec
• 36 ECC-384/sec
• Fmax 182 MHz
• 3368 FF/LUT pairs
• 5 BRAM
• 4 DSP48

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